Pre-emphasis transmitter (0.007 mm2, 8 Gbit/s, 0-14 dB) with improved data zero-crossing accuracy in 65 nm CMOS

A pre-emphasis transmitter with improved data zero-crossing accuracy is described. It is achieved via data re-synchronisation using a set of extended true single-phase clock latches before output combining, constituting a robust, area- and power-efficient solution. Fabricated in 65 nm CMOS, the full-rate one-tap pre-emphasis transmitter measures a total jitter of 33.12 ps up to an 8 Gbit/s data rate, and 25.04 to 38.75 ps under a 0-14 dB reconfigurable pre-emphasis range. The achieved output swing is as large as 550 mV_pp, and the active area is just 0.007 mm².