Title :
A voltage-scalable & process variation resilient hybrid SRAM architecture for MPEG-4 video processors
Author :
Chang, Ik Joon ; Mohapatra, Debabrata ; Roy, Kaushik
Author_Institution :
Purdue Univ., West Lafayette, IN, USA
Abstract :
We present a voltage-scalable and process-variation resilient memory architecture, suitable for MPEG-4 video processors such that power dissipation can be traded for graceful degradation in ldquoqualityrdquo. The key innovation in our proposed work is a hybrid memory array, which is mixture of conventional 6T and 8T SRAM bit-cells. The fundamental premise of our approach lies in the fact that human visual system (HVS) is mostly sensitive to higher order bits of luminance pixels in video data. We implemented a preferential storage policy in which the higher order luma bits are stored in robust 8T bit-cells while the lower order bits are stored in conventional 6T bit-cells. This facilitates aggressive scaling of supply voltage in memory as the important luma bits, stored in 8T bit-cells, remain relatively unaffected by voltage scaling. The not-so-important lower order luma bits, stored in 6T bit-cells, if affected, contribute insignificantly to the overall degradation in output video quality. Simulation results show average power savings of up to 56%, in the hybrid memory array compared to the conventional 6T SRAM array implemented in 65nm CMOS. The area overhead and maximum output quality degradation (PSNR) incurred were 11.5% and 0.56 dB, respectively.
Keywords :
CMOS integrated circuits; SRAM chips; video codecs; CMOS process; MPEG-4 video processors; SRAM architecture; human visual system; hybrid memory array; luminance pixels; process variation; size 65 nm; video quality; voltage scaling; Degradation; Humans; MPEG 4 Standard; Memory architecture; Power dissipation; Random access memory; Robustness; Technological innovation; Visual system; Voltage; Graceful degradation; Low power SRAM; Supply voltage over-scaling;
Conference_Titel :
Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-6055-8497-3