DocumentCode
500930
Title
Physically justifiable die-level modeling of spatial variation in view of systematic across wafer variability
Author
Cheng, Lerong ; Gupta, Puneet ; Spanos, Costas ; Qian, Kun ; He, Lei
Author_Institution
Univ. of California, Los Angeles, CA, USA
fYear
2009
fDate
26-31 July 2009
Firstpage
104
Lastpage
109
Abstract
Modeling spatial variation is important for statistical analysis. Most existing works model spatial variation as spatially correlated random variables. We discuss process origins of spatial variability, all of which indicate that spatial variation comes from deterministic across-wafer variation, and purely random spatial variation is not significant. We analytically study the impact of across-wafer variation and show how it gives an appearance of correlation. We have developed a new die-level variation model considering deterministic across-wafer variation and derived the range of conditions under which ignoring spatial variation altogether may be acceptable. Experimental results show that our model is within 1% error from exact simulation result while the error of the existing distance-based spatial variation model is up to 8%. Moreover, our new model is also 10times faster than the spatial variation model for Monte-Carlo analysis.
Keywords
Monte Carlo methods; integrated circuit design; Monte-Carlo analysis; die-level variation model; spatial variation; spatially correlated random variables; statistical analysis; wafer variability; CMOS technology; Helium; Independent component analysis; Performance analysis; Permission; Random variables; Semiconductor device modeling; Silicon; Statistical analysis; Timing; Leakage Analysis; Process Variaion; SSTA; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE
Conference_Location
San Francisco, CA
ISSN
0738-100X
Print_ISBN
978-1-6055-8497-3
Type
conf
Filename
5227188
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