Analysis and comparison of three implementation methodologies for high-resolution DPWM

Digital pulse-width modulator (DPWM) is a crucial module for digitally controlled switching mode power supply (SMPS). High-resolution DPWM must be implemented under a reasonable clock frequency in order to satisfy the precision of output voltage and avoid limit cycles. Three methodologies which are the delay-line method, the delta-sigma (Delta-Sigma) method and the Hybrid method are respectively used to realize an 11-bit resolution DPWM on FPGA with a 32 MHz hardware clock frequency in this paper. This paper introduces the basic principle of the three methodologies and analyzes the advantage and disadvantage of them. Finally, it gives the experimental results of a digitally controlled SMPS system consisting of a synchronous buck converter and above DPWM, and compares the effects of the three methodologies on steady-state and dynamic performance.