• DocumentCode
    511396
  • Title

    Manufacturing pathway and associated challenges for nanoscale computational systems

  • Author

    Narayanan, Pritish ; Park, Kyoung Won ; Chui, Chi On ; Moritz, Andras C.

  • Author_Institution
    Univ. of Massachusetts, Amherst, MA, USA
  • fYear
    2009
  • fDate
    26-30 July 2009
  • Firstpage
    119
  • Lastpage
    122
  • Abstract
    We propose one possible manufacturing pathway for realizing nanodevice based computational fabrics that combines self-assembly based techniques with conventional photolithography. This pathway focuses on realizing the fabric as a whole including assembly of nanostructures, functionalization of devices, contacts and interconnects. Furthermore, this pathway is scalable to large systems, as multiple devices are created simultaneously in a self-aligning process step. We discuss the key sequence of steps for achieving nanoscale computational systems using the example of a simple digital logic circuit, and review the associated challenges involved for each of these.
  • Keywords
    digital circuits; electronic engineering computing; integrated circuit interconnections; logic circuits; nanoelectronics; photolithography; self-assembly; conventional photolithography; device functionization; digital logic circuit; interconnects; manufacturing pathway; nanodevice based computational fabrics; nanoscale computational systems; nanostructure assembly; self-aligning process step; self-assembly based techniques; Computer aided manufacturing; FETs; Fabrics; Integrated circuit interconnections; Lithography; Logic devices; Nanoscale devices; Nanowires; Self-assembly; Tiles; NASIC; Nanoscale fabrics; self-assembly;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanotechnology, 2009. IEEE-NANO 2009. 9th IEEE Conference on
  • Conference_Location
    Genoa
  • ISSN
    1944-9399
  • Print_ISBN
    978-1-4244-4832-6
  • Electronic_ISBN
    1944-9399
  • Type

    conf

  • Filename
    5394587