Title :
NDR based threshold logic fabric with memristive synapses
Author :
Rajendran, Jeyavijayan ; Manem, Harika ; Rose, Garrett S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Polytech. Inst. of NYU, Brooklyn, OH, USA
Abstract :
In recent years, many researchers have proposed the usage of molecular scale devices exhibiting negative differential resistance (NDR) in the realization of programmable logic circuitry. This paper deals with the utilization of one such system built from NDR based circuitry, specifically the Goto pair, in the implementation of a programmable threshold logic array (PTLA). Furthermore, the PTLA considered here uses memristors exhibiting multiple levels of resistance to provide weighted inputs to each threshold gate. Circuit level considerations for the Goto pair to be implemented as part of PTLA are discussed. An image classification application is also implemented using the proposed PTLA and simulated for functionality and performance using Cadence Spectre.
Keywords :
electrical resistivity; electronic engineering computing; image classification; logic gates; memristors; nanoelectronics; programmable logic arrays; resonant tunnelling diodes; Cadence Spectre; Goto pair; NDR; PTLA; image classification; memristive synapses; memristors; negative differential resistance; programmable logic circuitry; programmable threshold logic array; reconfigurable molecular switches; resonant tunneling diodes; threshold gate; threshold logic fabric; weighted inputs; Boolean functions; CMOS logic circuits; Diodes; Fabrics; Logic circuits; Logic devices; Memristors; Nanoscale devices; Programmable logic arrays; Programmable logic devices; Majority logic; Memristor; Programmable Majority Logic Array (PMLA); Resonant tunneling diodes (RTDs); Threshold Logic; nanotechnology; negative differential resistance;
Conference_Titel :
Nanotechnology, 2009. IEEE-NANO 2009. 9th IEEE Conference on
Conference_Location :
Genoa
Print_ISBN :
978-1-4244-4832-6
Electronic_ISBN :
1944-9399
