Title :
Behavorial model of carbon nanotube programmable resistors
Author :
Zhao, Weisheng ; Gamrat, Christian ; Agnus, Guillaume ; Derycke, Vincent ; Filoramo, Arianna ; Bourgoin, Jean-Philipe
Author_Institution :
Embedded Comput. Lab., CEA LIST, Gif-sur-Yvette, France
Abstract :
Hybrid Nano (e.g. Nanotube, Nanowire) /CMOS circuits combine both the advantages of Nano-devices and CMOS technologies; they have thus become one of the most promising candidates to relax the intrinsic drawbacks of CMOS circuits beyond Moore´s law. A behavioral simulation model for an hybrid Nano/CMOS design is presented in this paper. It is based on Optically Gated Carbon NanoTube Field Effect Transistors (OG-CNTFET), which can be used as 2-terminal programmable resistors. Their resistance can be adjusted precisely, reproducibly and in a non-volatile way, over three orders of magnitude. These interesting behaviors of OG-CNTFET promise great potential for developing the non-volatile memory and neuromorphic adaptive computing circuits. The model is developed in Verilog-A language and implemented on Cadence Virtuoso platform with Spectre 5.1.41 simulator. Many experimental parameters are included in this model to improve the simulation accuracy.
Keywords :
CMOS integrated circuits; carbon nanotubes; field effect transistors; hybrid integrated circuits; nanoelectronics; nanotube devices; programmable circuits; random-access storage; resistors; semiconductor device models; 2-terminal programmable resistors; CMOS technology; Cadence Virtuoso platform; Moore´s law; OG-CNTFET; Spectre 5.1.41 simulator; Verilog-A language; carbon nanotube programmable resistors; hybrid nano/CMOS design; nanodevices; neuromorphic adaptive computing circuit; nonvolatile memory application; optically gated carbon nanotube field effect transistors; CMOS technology; CNTFETs; Carbon nanotubes; Circuit simulation; Computational modeling; Moore´s Law; Neuromorphics; Nonvolatile memory; Resistors; Semiconductor device modeling; Behavioral Modelling; Carbon Nanotube; Hybrid Nano/CMOS circuits; OG-CNTFET; Verilog-A;
Conference_Titel :
Nanotechnology, 2009. IEEE-NANO 2009. 9th IEEE Conference on
Conference_Location :
Genoa
Print_ISBN :
978-1-4244-4832-6
Electronic_ISBN :
1944-9399