DocumentCode
5133
Title
Stochastic Iterative MIMO Detection System: Algorithm and Hardware Design
Author
Jienan Chen ; Jianhao Hu ; Sobelman, Gerald E.
Author_Institution
Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Volume
62
Issue
4
fYear
2015
fDate
Apr-15
Firstpage
1205
Lastpage
1214
Abstract
In this paper, we propose a Stochastic iterative multiple-input multiple-output (SIM) detection system based on the Markov chain Monte Carlo (MCMC) method. To improve the detection performance, the Gibbs sampler of the MCMC detector in the SIM is updated by the decoded bits from a channel decoder directly. The channel decoder is part of the updating unit that generates the new samples in the MCMC updating process. We also implement the SIM in a fully parallel scheme, which achieves a high detection speed. As a case study, we have designed and synthesized a 128-parallel 4 × 4 16-QAM SIM system using a CMOS 130 nm technology with a core area of 1.98 mm 2 and 457K logic gates. The SIM detection system can achieve a throughput of 787.5Mbps with a frame error rate (FER) 10-3 at Eb/N0=7dB, equaling the FER of a traditional iterative MIMO detection with four outer iterations.
Keywords
MIMO communication; Markov processes; Monte Carlo methods; channel coding; error statistics; logic gates; Gibbs sampler; Markov chain Monte Carlo method; channel decoder; decoded bits; frame error rate; logic gates; stochastic iterative MIMO detection system; Decoding; Detectors; Hardware; Iterative decoding; Logic gates; MIMO; Throughput; Markov chain Monte Carlo (MCMC); multiple-input multiple-output (MIMO) system; stochastic iterative MIMO (SIM); stochastic logic;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2015.2390558
Filename
7070862
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