• DocumentCode
    514121
  • Title

    Trapping Properties of Very Thin Nitride/Oxide Gate Insulators

  • Author

    Sun, J.Y.-C. ; Arienzo, M. ; Dori, L. ; Stein, K.

  • Author_Institution
    IBM Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, N. Y. 10598, USA
  • fYear
    1987
  • fDate
    14-17 Sept. 1987
  • Firstpage
    841
  • Lastpage
    844
  • Abstract
    The trapping properties of very thin nitride/oxide (10-14nm equivalent SiO2) composite gate insulators and their dependences on gate materials and process conditions are reported. Electron trapping and flatband voltage turn-around effects are more pronounced in these films than in thermal SiO2. They both appear to be dominated by water-related species in the bottom oxide layer when the top nitride layer is thin, similar to the case of thermal SiO2 only. For VLSI CMOS applications, trapping and instabilities in the nitride/oxide gate insulator can be minimized by (i) reducing the thickness of the top nitride layer, (ii) using polysilicon gates with proper work functions, and (iii) using appropriate high-temperature dehydration steps after polysilicon gate deposition.
  • Keywords
    Channel bank filters; Composite materials; Dielectric breakdown; Electron traps; Insulation; Ion implantation; Rapid thermal annealing; Substrates; Temperature; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1987. ESSDERC '87. 17th European
  • Conference_Location
    Bologna, Italy
  • Print_ISBN
    0444704779
  • Type

    conf

  • Filename
    5436773