• DocumentCode
    514122
  • Title

    1.2μm Bi-CMOS Technology with High Performance ECL

  • Author

    Iwai, H. ; Niitsu, Y. ; Sasaki, G. ; Norishima, M. ; Shino, K. ; Unno, Y. ; Tsugaru, K. ; Hara, H. ; Sugimoto, Y. ; Kanzaki, K.

  • Author_Institution
    Semiconductor Device Eng. Lab., Toshiba Corp., 1, Komukai-Toshiba-cho, Saiwai-ku, Kawasaki, 210, Japan.
  • fYear
    1987
  • fDate
    14-17 Sept. 1987
  • Firstpage
    29
  • Lastpage
    32
  • Abstract
    1.2μm Bi-CMOS technology with ECL gate for high speed device has been developed. A process is carefully optimized for obtaining the best performance of ECL gate without degrading 1.2μm Bi-CMOS performance and mass productivity.
  • Keywords
    BiCMOS integrated circuits; Bipolar transistors; Bismuth; CMOS logic circuits; CMOS process; CMOS technology; Logic devices; MOSFET circuits; Microcomputers; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1987. ESSDERC '87. 17th European
  • Conference_Location
    Bologna, Italy
  • Print_ISBN
    0444704779
  • Type

    conf

  • Filename
    5436774
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=514122