Title :
The role of holes and electrons in the aging of MOS transistors
Author :
Tosi, M. ; Baldi, L. ; Maggioni, F.
Author_Institution :
SGS Microelettronica, via C. Olivetti 2, 20041 Agrate Brianza (MI)-Italy
Abstract :
A new kind of representation of aging effects a MOS transsistors on a VD/VG diagrams is proposed. The working curue of N-channel or P-channel transistors, for different loading factors, can be easily plotted in this diagram and the regions of hole or electrons injection during the normal operating cycle identified. Since any change in transistor technology is reflected in a change of the iso-aging diagram, this kind of representation allows to compare different technologies and their limits with the need of different circut configuration. The results of experimental evaluation of different LDD structures are discussed.
Keywords :
Aging; Charge carrier processes; Degradation; Electron traps; Low voltage; MOSFETs; SPICE; Stress; Threshold voltage; Transconductance;
Conference_Titel :
Solid State Device Research Conference, 1987. ESSDERC '87. 17th European
Conference_Location :
Bologna, Italy