DocumentCode
516172
Title
Test Strategy For The Signal Processor KISS16
Author
PreiBner, J. ; Ebert, H. ; Mahlich, G. ; Sahm, H. ; Schuck, J. ; Weinsziehr, D.
Author_Institution
Philips Kommunikations Industrie AG, Department IC-Design (WTI), Thurn-und-Taxis-StraÃ\x9fe 10, D-8500 Nÿrnberg, Germany. Tel.: +49-911-526-3184, FAX: +49-911-526-3983
Volume
1
fYear
1991
fDate
11-13 Sept. 1991
Firstpage
205
Lastpage
208
Abstract
As the level of VLSI chip complexity increases to several hundred thousands transistors, aspects of test and design for testability become more important. Build-In Self Test (BIST) methods are increasingly applied on chip to raise the fault coverage, to minimize the purchase of expensive test equipment and at the end guarantee high quality parts for application. This paper presents the test strategy for the 16 bit digital signal processor KISS16. Major effort has been spent on the development of an open modular test concept, which uses functional BIST and scan test for structural testing.
Keywords
Automatic testing; Built-in self-test; Counting circuits; Digital signal processing chips; Digital signal processors; Logic testing; Read only memory; Read-write memory; Registers; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1991. ESSCIRC '91. Proceedings - Seventeenth European
Conference_Location
Milan, Italy
Type
conf
Filename
5467752
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