A Flexible Boundary Scan Implementation in a Silicon Compiler Environment

This paper reviews the design carried out to implement the IEEE P1149.1 boundary scan standard in the TSBC3 compiled portable library based on the GDT®/GENESIL® tools. The advantage of this compiled approach is to provide a flexible set of boundary scan cells, including pads and Test Access Port (TAP) controllers. The boundary scan register is automatically assembled while creating the pad ring and different parameterized function complexities allow to easily dedicate the TAP controller to any application. The cost of boundary scan integration has shown to be reasonnable in comparison with the ease of board testing.