A Submicron NMOS Multiplexer-Demultiplexer Chip Set for 622 Mb/s SONET Applications

Despite the gradual decline of NMOS as a mainstream integrated circuits technology, its submicron versions remain competitive for applications that require an operating speed beyond the capabilities of CMOS, a power dissipation below that attainable with silicon bipolar or III-V high-speed technologies, and a fabrication price lower than possible with BiCMOS. A class of such applications is defined by the hardware needs of the synchronous optical network (SONET), under development worldwide. This paper will present a submicron NMOS 12-channel multiplexer-demultiplexer chip set operating at the standard SONET bit rate of 622 Mb/s (STS-12). Emphasized is the interfacing circuitry that has enabled the parts to meet all required system I/O specifications, and has thereby resulted in their successful performance in SONET trials.