Title :
TESTCHIP: A Chip for Weighted Random Pattern Generation, Evaluation, and Test Control
Author :
Ströle, Albrecht P. ; Wunderlich, Hans-Joachim ; Haberl, Oliver F.
Author_Institution :
Inst. of Comput. Design & Fault Tolerance, Univ. of Karlsruhe, Karlsruhe, Germany
Abstract :
A chip is presented that generates weighted random patterns, applies them to a circuit under test and evaluates the test responses. The generated test patterns correspond to multiple sets of weights. Test response evaluation is done by signature analysis. The chip can easily be connected to a micro computer and thus constitutes the key element of a low-cost test equipment.
Keywords :
circuit testing; logic testing; microcomputers; system-on-chip; TESTCHIP; chip; circuit under test; evaluation; low cost test equipment; microcomputer; signature analysis; test control; weighted random pattern generation; Automatic test equipment; Automatic test pattern generation; Automatic testing; Circuit testing; Logic testing; Microcomputers; Production; System testing; Test equipment; Test pattern generators;
Conference_Titel :
Solid-State Circuits Conference, 1990. ESSCIRC '90. Sixteenth European
Conference_Location :
Grenoble
Print_ISBN :
2-86332-087-4
