• DocumentCode
    516505
  • Title

    Array Macro Set for a Microsystem in CMOS-Technology

  • Author

    Clemen, R. ; Eisenbraun, E. ; Fischer, W. ; Haug, W. ; Helwig, K. ; Lindner, H. ; Loehlein, W. ; Tong, M.

  • Author_Institution
    IBM Data System Division, Boeblingen, Germany
  • fYear
    1986
  • fDate
    16-18 Sept. 1986
  • Firstpage
    62
  • Lastpage
    64
  • Abstract
    A set of four high-performance exploratory static array macros (tacc= 7.5, 7.5, 9.5, 11.5 nS, densities up to 72K) has been developed for a VLSI design that uses logic and memory on the same chip. Technology used is 1¿ CMOS with single-level poly-Si and triple-level metal. Key design features include partial R/W, sense-circuit with pre-amplification and a new fuse scheme for redundancy.
  • Keywords
    CMOS logic circuits; CMOS technology; Capacitance; Clocks; Logic arrays; Logic design; Multiplexing; Redundancy; Signal design; US Department of Transportation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1986. ESSCIRC '86. Twelfth European
  • Conference_Location
    Delft, The Netherlands
  • Type

    conf

  • Filename
    5468290
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=516505