Design Concept for Radiation Hardening of Low Power and Low Voltage Dynamic Memories

A radiation hard low power, low voltage dynamic memory is obtained by the use of an advanced dummy cell concept. Compared to conventional dummy cell concepts, this concept applies a fully sized dummy cell. By optimizing the dummy cell precharge voltage for 5V and 3V operation and the timing of the dummy wordline, the overall soft error rate (SER) of the chip is improved by 2 orders of magnitude. This is because the SER sensitivity for a physical "1" is matched to the SER sensitivity for a physical "0". An additional improvement of 1 order of magnitude is possible for 3V operation by adjusting substrate bias and cell plate voltage. The results are verified by an accelerated SER measurement with a radium 226 source and an additional field soft error study.