• DocumentCode
    516658
  • Title

    A Test Concept for a DSP based Codec

  • Author

    Caldera, P.

  • Author_Institution
    Siemens Entwicklungszentrum fÿr Mikroelektronik, SiemensstraÃ\x9fe 2, A-9500 Villach, Austria
  • fYear
    1994
  • fDate
    20-22 Sept. 1994
  • Firstpage
    236
  • Lastpage
    239
  • Abstract
    The increasing performance of chips nowadays demands new test strategies allowing short test time together with a high fault coverage. To decrease the overall test costs board as well as system tests must be supported. Therefore the test concept has to be developed in a very early step of system and circuit design in cooperation with the customer. In this paper a test concept for a DSP based codec including digital and analog BIST will be presented
  • Keywords
    Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Codecs; Digital signal processing; Digital signal processing chips; Programmable logic arrays; Registers; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1994. ESSCIRC '94. Twentieth European
  • Conference_Location
    Ulm, Germany
  • Print_ISBN
    2-86332-160-9
  • Type

    conf

  • Filename
    5468489
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=516658