DocumentCode
516659
Title
A 100MHz 4mW Four-Quadrant BiCMOS Analogue Multiplier
Author
Franciotta, M. ; Colli, Gianluca ; Castello, R.
Author_Institution
UniversitÃ\xa0 of Pavia, Department of Electronics - Via Abbiategrasso, 209 - 27100 Pavia, Italy; CSEM S.A. - CH - 2007 - Neuchâtel - Switzerland
fYear
1994
fDate
20-22 Sept. 1994
Firstpage
240
Lastpage
243
Abstract
An analogue four-quadrant multiplier based on a simple, highly linear and fast BiCMOS transconductor using MOS transistors operating in the triode region and vertical npn bipolar is presented. The four quadrant operation is obtained by cross-coupling in a Gilbert-cell fashion two transconductors and using a third stage to modulate the transconductance of the former two. A chip prototype has been designed to obtain high linearity on both inputs and high speed of operation up to a 3V supply voltage and 4mW dissipated power. It has been integrated in a 1.2¿m BiCMOS process.
Keywords
BiCMOS integrated circuits; CMOS technology; Consumer electronics; Linearity; Low voltage; MOSFETs; Predistortion; Prototypes; Transconductance; Transconductors;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1994. ESSCIRC '94. Twentieth European
Conference_Location
Ulm, Germany
Print_ISBN
2-86332-160-9
Type
conf
Filename
5468490
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