DocumentCode
516762
Title
A Data-Driven IDCT Architecture for Low Power Video Applications
Author
Xanthopoulos, Thucydides ; Chandrakasan, Anantha P. ; Sodini, Charles G. ; Dally, William J.
Author_Institution
Massachusetts Institute of Technology, Cambridge, Massachusetts 02139
fYear
1996
fDate
17-19 Sept. 1996
Firstpage
196
Lastpage
199
Abstract
Analysis of transform coded (MPEG) video data streams reveals a large percentage of zero-valued Discrete Cosine Transform (DCT) coefficients. A Data-Driven 2D IDCT architecture (DDIDCT) is proposed which exploits this observation for energy efficiency. The DDIDCT architecture exploits variability in the computational workload caused by the presence of zero-valued DCT coefficients by adaptively changing the power supply and the clock frequency of the main computation units. Adaptive minimization of switching events and power supply voltage make the DDIDCT approach more energy efficient than a conventional fast row-column Distributed Arithmetic IDCT implementation by more than an order of magnitude for the same sample rate.
Keywords
Arithmetic; Clocks; Computer architecture; Discrete cosine transforms; Discrete transforms; Energy efficiency; Frequency; Power supplies; Streaming media; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1996. ESSCIRC '96. Proceedings of the 22nd European
Conference_Location
Neuchatel, Switzerland
Print_ISBN
2-86332-197-8
Type
conf
Filename
5468625
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