DocumentCode
516800
Title
A Low-Control-Overhead Asynchronous Differential Equation Solver
Author
Yun, KennethY ; Beerel, Peter A. ; Vakilotojar, Vida ; Dooply, AyoobE ; Arceo, Julio
Author_Institution
Dept. of ECE, University of California, San Diego
fYear
1996
fDate
17-19 Sept. 1996
Firstpage
352
Lastpage
355
Abstract
This paper describes the design of a high-performance asynchronous differential equation solver, a common DSP application. The high performance is achieved by two means. First, efficient self-timed datapath elements were designed, including a self-timed carry-bypass adder with low-overhead domino completion-detection and a staggered-evaluation precharged multiplier using carry-save-addition. Second, asynchronous control circuit overhead was minimized to 12% by using an efficient 3D control circuit design style and timing assumptions to effectively hide control circuit delay. The design has been simulated in a 1.2¿m two-metal HP SCMOS process and compared to comparable synchronous designs. Its average-case performance (simulated at 25°C and 5V) is estimated to be 37% faster than the synchronous worst-case performance (simulated at 100°C and 4.5V).
Keywords
Adders; Algorithm design and analysis; Circuit simulation; Circuit synthesis; Delay effects; Delay estimation; Differential equations; Digital signal processing; Statistics; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1996. ESSCIRC '96. Proceedings of the 22nd European
Conference_Location
Neuchatel, Switzerland
Print_ISBN
2-86332-197-8
Type
conf
Filename
5468664
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