Title :
A 565/680Mb/s Coder/Decoder for Fibre Optic Links
Author :
Taylor, D.G. ; Childs, J. ; Mudd, M.S.J. ; Saul, P.H. ; Ward, P.J. ; Wood, I.C.
Author_Institution :
Plessey Research (Caswell) Ltd., Caswell, Towcester, Northants, U.K.
Abstract :
A high performance silicon integrated circuit for a 565/680Mb/s optical fibre transmit and receive system will be described. The paper includes a functional description of the coder/decoder together with details of circuit design and layout techniques used to realise this demanding performance requirement. The LSI chip contains over 8000 components with gate delays as low as 250pS.
Keywords :
Clocks; Coupling circuits; Decoding; Delay; Fiber optics; Logic; Optical fibers; Photonic integrated circuits; Read only memory; Thermal management;
Conference_Titel :
Solid-State Circuits Conference, 1984. ESSCIRC '84. Tenth European
Conference_Location :
Edinburgh, UK
