Title :
A Proposal for Detecting Degradation in Logic Circuits by Counting Errors Induced by Gaussian Noise
Author :
Ager, D.J. ; Mylotte, P.S.
Author_Institution :
Post Office Research Centre
Keywords :
Circuit noise; Circuit testing; Degradation; Earth; Error analysis; Gaussian noise; Logic circuits; Noise measurement; Proposals; Threshold voltage;
Conference_Titel :
Solid State Circuits Conference (ESSCIRC), 1975 First European
Conference_Location :
Canterbury, UK
Print_ISBN :
0-85296-149-9
