DocumentCode
517111
Title
A 1024 Bits R M M Memory with T T L Compatibility
Author
Mackowiak, E. ; Le Goascoz, V.
Author_Institution
C.E.N.G., LETI/MEA, C.E.A., Grenoble, France
fYear
1976
fDate
21-24 Sept. 1976
Firstpage
44
Lastpage
45
Abstract
We present a MNOS 1 Kbit R M M memory built on silicon on sapphire. Test results are given and compared to simulation in the 0-70°C temperature range.
Keywords
integrated memory circuits; silicon-on-insulator; transistor-transistor logic; MNOS RMM memory; RMM memory; TTL compatibility; silicon on sapphire; storage capacity 1024 bit; temperature 0 degC to 70 degC; Breakdown voltage; Buffer storage; Circuit testing; Diodes; Doping; Energy consumption; Read-write memory; Silicon; Temperature distribution; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference, 1976. ESSCIRC 76. 2nd European
Conference_Location
Toulouse
Type
conf
Filename
5469233
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