• DocumentCode
    517221
  • Title

    A Monolithic Digital Frequency Synthesizer for PLL Systems

  • Author

    Kebler, H.

  • Author_Institution
    Siemens AG
  • fYear
    1975
  • fDate
    2-5 Sept. 1975
  • Firstpage
    58
  • Lastpage
    59
  • Abstract
    A monolithic digital frequency synthesizer circuit in p-channel MOS enhancement-depletion-mode technology is presented, consisting of a Phase Comparator, an 8-fold switchable 6,5 MHz divider for the reference frequency and a 2,5 MHz synchronous divider, fully programmable between 21 and 29, for the synthesized frequency, which can be chosen between 500 Hz and 500 MHz.
  • Keywords
    Circuit synthesis; Current supplies; Frequency conversion; Frequency synthesizers; Integrated circuit synthesis; Phase locked loops; Signal synthesis; Switching circuits; Voltage control; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Circuits Conference (ESSCIRC), 1975 First European
  • Conference_Location
    Canterbury, UK
  • Print_ISBN
    0-85296-149-9
  • Type

    conf

  • Filename
    5469356
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=517221