• DocumentCode
    517240
  • Title

    Charge Domain Filter Operating Up to 20 MHz Clock Frequency

  • Author

    Gal, R.A.J. ; Wallinga, H.

  • Author_Institution
    Twente University of Technology, Solid-State Electronics Group, Dep. EE, Enschede, The Netherlands
  • fYear
    1983
  • fDate
    21-23 Sept. 1983
  • Firstpage
    45
  • Lastpage
    48
  • Abstract
    An analog sampled data low pass third order Butterworth filter has been realised in a buried channel CCD technology. This Charge Domain Filter, composed of transversal and recursive CCD filter sections, has been tested at clock frequencies up to 20 MHz.
  • Keywords
    Charge coupled devices; Clocks; Cutoff frequency; Delay; Low pass filters; Poles and zeros; Solid state circuits; Testing; Transfer functions; Transversal filters;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1983. ESSCIRC '83. Ninth European
  • Conference_Location
    Lausanne, Switzerland
  • Print_ISBN
    2-88074-021-5
  • Type

    conf

  • Filename
    5469376
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=517240