Title :
Statistical Tolerance Analysis and Design of a Large Integrated Circuit
Author_Institution :
Department of Electronic & Electrical Engineering, University of London King´´s College, Strand, London, WC2R 2LS.
Keywords :
Active filters; Circuit analysis; Design engineering; Design methodology; Equations; Impedance; Resistors; Sampling methods; Statistical analysis; Tolerance analysis;
Conference_Titel :
Solid State Circuits Conference (ESSCIRC), 1975 First European
Conference_Location :
Canterbury, UK
Print_ISBN :
0-85296-149-9
