DocumentCode
517261
Title
A Tone Free, Stable, 3rd Order Single Loop ΔΣA/D Converter Based On A New Design Approach
Author
Kadivar, S.R. ; Schmitt-Landsiedel, D. ; Mauthe, M. ; Klar, H.
Author_Institution
SIEMENS AG, ZFE T ME 2, Otto Hahn Ring, 6, 81730 Munich Germany; TECHNICAL UNIVERSITY OF BERLIN, JebenstraÃ\x9fe 1, 10623 Berlin Germany
fYear
1995
fDate
19-21 Sept. 1995
Firstpage
306
Lastpage
309
Abstract
This paper presents a tone free, stable, single loop 3rd order ΔΣ ADC. Performance and stability are obtained through an optimum network scaling based on a novel interactive design methodology. This approach enables for the first time to solve the stability problem in higher order, single loop ΔΣ ADCs without architecture modification and guarantees their full optimization. Simulations of 4th and 5th order structures based on this approach further confirm the efficiency of this method.
Keywords
Circuit noise; Circuit stability; Costs; Design methodology; Noise reduction; Optimization methods; Quantization; Signal to noise ratio; Switched capacitor circuits; Switched capacitor networks;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1995. ESSCIRC '95. Twenty-first European
Conference_Location
Lille, France
Print_ISBN
2-86332-180-3
Type
conf
Filename
5469397
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