Title :
Notice of Retraction
The algorithm of confirming increasable bottleneck device in dynamic integrated scheduling based on static parallel time
Author :
Zhiqiang Xie ; Qinglian Yu ; Yue Wang ; Jing Yang
Author_Institution :
Coll. of Comput. Sci. & Technol., Harbin Univ. of Sci. & Technol., Harbin, China
Abstract :
Notice of Retraction
After careful and considered review of the content of this paper by a duly constituted expert committee, this paper has been found to be in violation of IEEE´s Publication Principles.
We hereby retract the content of this paper. Reasonable effort should be made to remove all past references to this paper.
The presenting author of this paper has the option to appeal this decision by contacting TPII@ieee.org.
Aiming at the problems that there is a big difference between the parallel total time of operations and real parallel time in processing and assembly integrated scheduling of dynamic complex product to confirm increasable bottleneck device, and an algorithm which can confirm the increasable bottleneck device in dynamic integrated scheduling based on static parallel time is presented. Firstly, a processing tree of virtual product, consisting of remaining (remaining operations is included) and new products, is constructed. Then according to the processing tree of virtual product, the algorithm calculates operation´s starting and ending times, according to overlapping projection, calculates the total static parallel time, and selects a device whose total static parallel time is the largest as an dynamic increasable bottleneck device; when new products arrive to be processed, the remaining operations have priority to schedule, the rest of operations adopt ACPM to confirm scheduling order. The analysis and example show that the algorithm confirming the dynamic increasable bottleneck device is justifiable.
Keywords :
product development; scheduling; dynamic complex product; dynamic integrated scheduling; increasable bottleneck device; processing tree; static parallel time; virtual product; Accidents; Algorithm design and analysis; Assembly; Computer science; Dynamic scheduling; Educational institutions; Heuristic algorithms; Processor scheduling; Productivity; Scheduling algorithm; dynamic scheduling; increasable bottleneck device; processing tree of virtual product; real parallel time; total static parallel time;
Conference_Titel :
Computer Engineering and Technology (ICCET), 2010 2nd International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-6347-3
DOI :
10.1109/ICCET.2010.5485701