RLC interconnect modeling using delay algebraic equations

This paper presents a model for fast transient analysis for single line resistance-inductance-capacitance (RLC) on-chip interconnects. The proposed algorithm, based on a modified Lie formula, is used to convert the solution of the transmission line network into delay algebraic equations, which can be solved in a closed form manner. The proposed algorithm is not limited to fixed number of coupled RLC lines or to specific topologies and can be used to model both identical and non-identical multi-conductor lines and loads.