On the power efficiency of cascode compensation over Miller compensation in two-stage operational amplifiers

Author

Aminzadeh, Hamed ; Mafinezhad, K.

Author_Institution

EE. Dept., Ferdowsi Univ. of Mashhad, Mashhad, Iran

fYear

2008

fDate

11-13 Aug. 2008

Firstpage

283

Lastpage

288

Abstract

Optimization of power consumption is one of the main design challenges in today´s low-power high-speed analog integrated circuits. In this paper, two popular techniques to stabilize two-stage operational amplifiers, namely Miller and cascode compensations are compared from power point of view. To accomplish this, the cascode-compensated structure is basically analyzed to derive the required equations for comparison. The results show that for the same specifications, cascode compensation is more power efficient than Miller compensation especially for heavy capacitive loads. This has been confirmed by circuit-level simulations in 0.25 μm CMOS technology.

Keywords

CMOS analogue integrated circuits; low-power electronics; operational amplifiers; CMOS technology; Miller compensation; cascode compensation; circuit-level simulations; low-power high-speed analog integrated circuits; power efficiency; two-stage operational amplifiers; Bandwidth; CMOS technology; Capacitors; Energy consumption; Frequency; Operational amplifiers; Power amplifiers; Resistors; Stability; Voltage; Miller compensation; cascode compensation; frequency compensation; low-power; power efficiency; stability; two-stage operational amplifiers;

fLanguage

English

Publisher

ieee

Conference_Titel

Low Power Electronics and Design (ISLPED), 2008 ACM/IEEE International Symposium on

Conference_Location

Bangalore

Print_ISBN

978-1-4244-8634-2

Electronic_ISBN

978-1-60558-109-5

Type

conf

DOI

10.1145/1393921.1393995

Filename

5529023