Design flow for data transfer system development by the example of QPSK base-band system

In this paper we use the design flow technique in addition to hardware-in-the-loop using FPGA and applied these techniques for the QPSK base-band system. The proposed model and technique have proved to be good specially in the minimization of the “human factor” in the conversion of mathematical model to hardware. The paper covers the full development cycle from a mathematical model to a bit-file. For the purpose of illustration for the proposed design flow, development of a quadrature phase modulation narrowband data transfer system (QPSK system) is reviewed step by step in this paper.