A computationally efficient electro-thermal modelling technique for coupled Multi-Disciplinary Analysis of Multi-Chip Power Modules

Compact thermal impedance models allow fast, fully coupled electro-thermal simulation of multi-chip power modules. Usually, these models are generated through a time and labour intensive process of curve fitting to data points obtained experimentally or from finite-element simulations. This paper demonstrates a new, much faster, technique which mathematically derives such models and validates it against experimental measurements for an example multi-chip module. The ease of use and coupling capabilities of the models when used with an accurate device model is then demonstrated.