• DocumentCode
    526080
  • Title

    A novel 600V-LDMOS with HV-interconnection for HVIC on thick SOI

  • Author

    Yamaji, Masaharu ; Abe, Keisei ; Maiguma, Takeshi ; Takahashi, Hidenori ; Sumida, Hitoshi

  • Author_Institution
    Fuji Electr. Holdings Co. Ltd., Matsumoto, Japan
  • fYear
    2010
  • fDate
    6-10 June 2010
  • Firstpage
    101
  • Lastpage
    104
  • Abstract
    A novel LDMOS structure with the HV-interconnection for a 600V-HVIC on thick SOI is proposed. There are two original points in the proposed structure. One is the formation of the double floating p-layers under the HV-interconnection to prevent potential distribution in the drift from disturbing due to the HV-interconnection, and the other is a good combination between the LDMOS structure and multiple trench isolation to obtain the isolation performance over 600V. From the proposed structure the high blocking capability of the LDMOS, including both off- and on-breakdown voltages over 600V and high hot carrier instability, and the isolation performance over 1200V can be obtained successfully. This paper will show numerical and experimental results in detail.
  • Keywords
    electric breakdown; hot carriers; power integrated circuits; silicon-on-insulator; HVIC; LDMOS structure; V-interconnection; high hot carrier instability; isolation performance; multiple trench isolation; thick SOI; voltage 600 V; Filling; Hot carriers; Impact ionization; Impurities; Integrated circuit interconnections; Isolation technology; Power semiconductor devices; Power semiconductor switches; Testing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Semiconductor Devices & IC's (ISPSD), 2010 22nd International Symposium on
  • Conference_Location
    Hiroshima
  • ISSN
    1943-653X
  • Print_ISBN
    978-1-4244-7718-0
  • Electronic_ISBN
    1943-653X
  • Type

    conf

  • Filename
    5544912