• DocumentCode
    528658
  • Title

    The feedforward ΔΣ ADC employing an adder comparator

  • Author

    Nishida, Yoshio

  • Author_Institution
    Intell. Sensing Syst. Res. Center, Toyohashi Univ. of Technol., Toyohashi, Japan
  • fYear
    2010
  • fDate
    7-10 Sept. 2010
  • Firstpage
    173
  • Lastpage
    176
  • Abstract
    This paper presents the implementation of analog signal adder in the feedforward delta-sigma A/D converters, which offers a wide signal bandwidth. An analog signal adder employing the current-mode addition is introduced and the adder comparator including the adder is described. This study examines the functionality and feasibility of the adder comparator in the delta-sigma ADC. The circuit simulation results show that the ADC offers a very compatible performance similar to those that use the ideal adder. Based on the depth analysis of circuit non-ideality of the adder, the ADC is highly tolerable to non-ideal characteristics that arise from process variation/circuit imperfections.
  • Keywords
    adders; analogue-digital conversion; comparators (circuits); delta-sigma modulation; adder comparator; analog signal adder; current-mode addition; delta-sigma A/D converter; feedforward ΔΣ ADC; signal bandwidth; Adders; Equations; Feedforward neural networks; Integrated circuit modeling; Modulation; SPICE; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals and Electronic Systems (ICSES), 2010 International Conference on
  • Conference_Location
    Gliwice
  • Print_ISBN
    978-1-4244-5307-8
  • Electronic_ISBN
    978-83-9047-4-2
  • Type

    conf

  • Filename
    5595223