• DocumentCode
    52896
  • Title

    An 8 Mb Multi-Layered Cross-Point ReRAM Macro With 443 MB/s Write Throughput

  • Author

    Kawahara, A. ; Azuma, R. ; Ikeda, Yasuhiro ; Kawai, Kunihiro ; Katoh, Y. ; Hayakawa, Yoshikazu ; Tsuji, Keita ; Yoneda, Satoshi ; Himeno, Akira ; Shimakawa, Koichi ; Takagi, Toshiyuki ; Mikawa, T. ; Aono, K.

  • Author_Institution
    Panasonic Corp., Kyoto, Japan
  • Volume
    48
  • Issue
    1
  • fYear
    2013
  • fDate
    Jan. 2013
  • Firstpage
    178
  • Lastpage
    185
  • Abstract
    An 8-Mb multi-layered cross-point resistive RAM (ReRAM) macro has been developed with 443 MB/s write throughput (64-bits parallel write per 17.2-ns cycle), which is almost twice as fast as competing methods. It uses the fast switching performance of TaOx ReRAM and a new write architecture to reduce the sneak current in a cross-point cell array structure based on an 0.18-μm process. First, a bidirectional diode as a memory cell select element is developed to reduce the sneak current. Second, PMOS and NMOS are used select transistors in the source follower to realize stable switching for the selected cell in the multi-layered cross-point structure. Third, a hierarchical bitline (BL) structure is employed with a short bitline. Fourth, multi-bit write architecture is developed to realize fast write operation and to suppress the sneak current.
  • Keywords
    MOSFET; random-access storage; semiconductor diodes; NMOS transistors; PMOS transistors; TaOx ReRAM switching performance; bidirectional diode; bit rate 443 Mbit/s; bit rate 8 Mbit/s; cross-point cell array structure; hierarchical BL structure; hierarchical bitline structure; memory cell select element; multilayered cross-point ReRAM macro; multilayered cross-point resistive RAM macro; size 0.18 mum; time 17.2 ns; word length 64 bit; Arrays; Microprocessors; Schottky diodes; Switches; Transistors; ReRAM; bidirectional diode; cross-point; error check and correct; multi-bit write architecture; multi-layer; resistive memory element; short bitline structure; write dummy cell; write throughput;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2012.2215121
  • Filename
    6327378