WLAN/WiMAX RF front-end reliability analysis

Circuit ageing degradation is becoming worse in advanced node technologies, where low power and low cost RF front-end should be implemented. Thus, reliability is one of the most important challenges. In this work, we analyze a WLAN/WiMAX RF front-end architecture reliability with a behavioral description language (VerilogA) using a top-down approach. We have found the sensitive building blocks and the worst performance variations. We pointed out the programmable gain amplifier (PGA) as the most sensitive building block. The PGA failure is responsible for the degradation of the gain, the noise, and the linearity of the architecture. In low frequency signals, the digital controlled oscillator (DCO) becomes the dominant source of noise degradation.