Fast regular expression matching in hardware using NFA-BDD combination

Author

Chasaki, Danai ; Wolf, Tilman

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA

fYear

2010

fDate

25-26 Oct. 2010

Firstpage

1

Lastpage

2

Abstract

The development of Network Intrusion Detection Systems (NIDS) is nowadays a powerful solution to defend against various network security threats. There has been a lot of research effort devoted to hardware-based NIDS, because of (1) the massive amount of computation performed by regular expression matching algorithms and (2) the gigabit per second performance requirement of modern NIDS. Hardware-based NIDS take advantage of parallelization inherent in FPGAs, ASICs or network processors to support very high network speeds, while software approaches fail to do so.

Keywords

application specific integrated circuits; binary decision diagrams; computer network security; field programmable gate arrays; finite automata; reconfigurable architectures; ASIC; FPGA; NFA-BDD combination; binary decision diagrams; fast regular expression matching; gigabit per second performance; hardware-based NIDS; network intrusion detection systems; network processors; network security threats; network speeds; nondeterministic finite automata; parallelization; Automata; Boolean functions; Data structures; Doped fiber amplifiers; Field programmable gate arrays; Hardware; Intrusion detection;

fLanguage

English

Publisher

ieee

Conference_Titel

Architectures for Networking and Communications Systems (ANCS), 2010 ACM/IEEE Symposium on

Conference_Location

La Jolla, CA

Print_ISBN

978-1-4244-9127-8

Electronic_ISBN

978-1-4503-0379-8

Type

conf

Filename

5623839