DocumentCode
533429
Title
High speed pattern matching algorithm based on deterministic finite automata with faulty transition table
Author
Kastil, Jan ; Korenek, Jan
Author_Institution
Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
fYear
2010
fDate
25-26 Oct. 2010
Firstpage
1
Lastpage
2
Abstract
Regular expression matching is the time-critical operation of many modern intrusion detection systems (IDS). This paper proposes pattern matching algorithm to match regular expression against multigigabit data stream. As usually used regular expressions are only subjectively tested and often generates many false positives/ negatives, proposed algorithm support the possibility to reduce memory requirements by introducing small amount of faults into the pattern matching. Algorithm is based on the perfect hashing and is suitable for hardware implementation.
Keywords
computer network security; cryptography; deterministic automata; finite automata; pattern matching; deterministic finite automata; faulty transition table; hardware implementation; hashing; high speed pattern matching; intrusion detection systems; memory requirements; multigigabit data stream; regular expressions; time-critical operation; Automata; Doped fiber amplifiers; Field programmable gate arrays; Memory management; Pattern matching; Throughput; USA Councils; Intrusion Detection; Perfect hashing; Protocol recognition; pattern matching;
fLanguage
English
Publisher
ieee
Conference_Titel
Architectures for Networking and Communications Systems (ANCS), 2010 ACM/IEEE Symposium on
Conference_Location
La Jolla, CA
Print_ISBN
978-1-4244-9127-8
Electronic_ISBN
978-1-4503-0379-8
Type
conf
Filename
5623846
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