A Reconfigurable Video Moving Target Detection IP Core

This paper designs a reconfigurable video MTD IP core, which established in XUP Virtex-II Pro development system platform. The design takes System Generator for the development tool, which is a system-level modeling tool developed by Xilinx Inc, to built a reconfigurable video MTD algorithm in MATLAB/Simulink environment, which is available for the FPGA platform. Then the algorithm is solidified as the hardware structure and is achieve in the form of IP core to achieve the purpose of IP reuse. The experiment has testified that the video MTD IP core meet the purpose of hardware acceleration and real-time video MTD. During the whole algorithm development process, we don´t need to understand and use RTL-level hardware description language, and gives full play to the maximum performance of FPGA-based DSP. It improves system reliability and design flexibility, and has high availability.