DocumentCode :
540174
Title :
Variable rate 16/64/256 QAM demodulator IC for digital video reception
Author :
Raghavan, S.A.
fYear :
1996
fDate :
5-7 June 1996
Firstpage :
68
Abstract :
A single VLSI chip solution for variable rate demodulation of 16/64/256 QAM modulated signals is described. This chip is suitable for receiving QAM modulated signals over cable and MMDS (multi-point microwave distribution system} channels. The IC is capable of working both in bandpass sampling mode, and quadrature sampling mode. The functional blocks of the chip inc1ude: a digital decimation filter for variable symbol rate demodulation, digital receive filtering for matched filtering, a fully adaptive decision-feedback (DFE) equalizer to compensate for the micro-relections, dc offset correction to remove baseline wander effects, quadrature imbalance compensation, digitally implemented carrier recovery loop, automatic gain control (AGC), and digitally implemented symbol timing loop. The chip was implemented in 3.3 volt, 0.5 micron CMOS technology, and has been successfully tested in various laboratory experiments and field trials.
Keywords :
Demodulation; Finite impulse response filter; Quadrature amplitude modulation; Receivers; Timing; Tracking loops;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics, 1996. Digest of Technical Papers., International Conference on
Print_ISBN :
0-7803-3029-3
Type :
conf
DOI :
10.1109/ICCE.1996.517212
Filename :
5726343
Link To Document :
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