Title :
A 24-GHz 3.8-dB NF low-noise amplifier with built-in linearizer
Author :
Kuo, Yen-Hung ; Tsai, Jeng-Han ; Chou, Wei-Hung ; Huang, Tian-Wei
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
A K-band low-noise amplifier with built-in linearizer using 0.18-μm CMOS technology is presented in this paper. To achieve good linearity at high frequency, a distributed derivative superposition linearization technique is used. The measured results show that the improvement of IIP3 and IM3 are 5.3 dB and 10.6 dB at 24 GHz, respectively. The proposed LNA has a noise figure of 3.8 dB and a peak gain of 13.7 dB while consuming 18 mW dc power. To the best of our knowledge, this is the first LNA with a built-in linearizer above 20 GHz in CMOS.
Keywords :
CMOS integrated circuits; low noise amplifiers; microwave amplifiers; CMOS technology; K-band low-noise amplifier; built-in linearizer; distributed derivative superposition linearization technique; frequency 24 GHz; gain 10.6 dB; gain 13.7 dB; gain 5.3 dB; noise figure 3.8 dB; size 0.18 mum; CMOS integrated circuits; Gain; Linearization techniques; Low-noise amplifiers; Noise measurement; Transistors; Transmission line measurements; CMOS; K-band; linearizer; low noise amplifier (LNA);
Conference_Titel :
Microwave Conference Proceedings (APMC), 2010 Asia-Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-7590-2
Electronic_ISBN :
978-1-902339-22-2
