A novel design technique of Doherty power amplifier

Author

Zeng, Rong ; Cao, Tao ; Liu, YouJiang ; Zhou, Jie

Author_Institution

Inst. of Electron. Eng., China Acad. of Eng. Phys., Mianyang, China

fYear

2011

fDate

20-22 April 2011

Firstpage

1

Lastpage

3

Abstract

In order to improve efficiency performance of Doherty power amplifier at output back-off area, a novel design technique - dual match technique and its implementation method are proposed to cope with the disadvantages of traditional design technique. A Doherty amplifier based on LDMOS devices is designed by this method. The improvement of power added efficiency (PAE) with dual match is better than the one without dual match. The PAE of the Doherty amplifier is 15% higher than the balance amplifier and is more than 40% within 8dB back-off area due to simulations. Tested results show a 12dB gain and 10% higher PAE compared to double AB amplifier within a 6dB output power back-off area.

Keywords

MOS integrated circuits; integrated circuit design; power amplifiers; Doherty power amplifier; LDMOS devices; balance amplifier; dual match technique; efficiency performance; power added efficiency; Gain; Impedance; Impedance matching; Optimized production technology; Performance evaluation; Power amplifiers; Power generation;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference Proceedings (CJMW), 2011 China-Japan Joint

Conference_Location

Hangzhou

Print_ISBN

978-1-4577-0625-7

Electronic_ISBN

978-7-308-08555-7

Type

conf

Filename

5773991