DocumentCode :
54636
Title :
A Stacked-FET Linear SOI CMOS Cellular Antenna Switch With an Extremely Low-Power Biasing Strategy
Author :
Donggu Im ; Bum-Kyum Kim ; Do-Kyung Im ; Kwyro Lee
Author_Institution :
Div. of Electron. Eng., Chonbuk Nat. Univ., Jeonju, South Korea
Volume :
63
Issue :
6
fYear :
2015
fDate :
Jun-15
Firstpage :
1964
Lastpage :
1977
Abstract :
A stacked field-effect transistor (FET) linear cellular antenna switch adopting a transistor layout with odd-symmetrical drain-source metal wiring and an extremely low-power biasing strategy has been implemented in silicon-on-insulator CMOS technology. A multi-fingered switch-FET device with odd-symmetrical drain-source metal wiring is adopted herein to improve the insertion loss (IL) and isolation of the antenna switch by minimizing the product of the on-resistance and off-capacitance. To remove the spurious emission and digital switching noise problems from the antenna switch driver circuits, an extremely low-power biasing scheme driven by only positive bias voltage has been devised. The proposed antenna switch that employs the new biasing scheme shows almost the same power-handling capability and harmonic distortion as a conventional version based on a negative biasing scheme, while greatly reducing long start-up time and wasteful active current consumption in a stand-by mode of the conventional antenna switch driver circuits. The implemented single-pole four-throw antenna switch is perfectly capable of handling a high power signal up to +35 dBm with suitably low IL of less than 1 dB, and shows second- and third-order harmonic distortion of less than -45 dBm when a 1-GHz RF signal with a power of +35 dBm and a 2-GHz RF signal with a power of +33 dBm are applied. The proposed antenna switch consumes almost no static power.
Keywords :
CMOS integrated circuits; MOSFET; antennas; driver circuits; elemental semiconductors; harmonic distortion; integrated circuit noise; low-power electronics; silicon; silicon-on-insulator; switches; wiring; IL; antenna switch isolation; digital switching noise problem; driver circuit; extremely low-power biasing strategy; field-effect transistor; frequency 1 GHz; frequency 2 GHz; insertion loss; multi-fingered switch-FET device; negative biasing scheme; odd-symmetrical drain-source metal wiring; positive bias voltage; power-handling capability; second-order harmonic distortion; silicon-on-insulator; single-pole four-throw antenna; stacked-FET linear SOI CMOS linear cellular antenna switch; third-order harmonic distortion; transistor layout; wasteful active current consumption; Antennas; Capacitance; Layout; Metals; Switches; Switching circuits; Wiring; Antenna switch; cellular; negative voltage; power loss; power-handling capability; silicon-on-insulator (SOI); stacked field-effect transistor (FET); switch driver; switch-FET device;
fLanguage :
English
Journal_Title :
Microwave Theory and Techniques, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9480
Type :
jour
DOI :
10.1109/TMTT.2015.2427801
Filename :
7102778
Link To Document :
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