Title :
3D LSI technology and reliability issues
Author :
Tanaka, T. ; Bea, J. ; Murugesan, M. ; Lee, K. ; Fukushima, T. ; Koyanagi, M.
Author_Institution :
Grad. Sch. of Biomed. Eng., Tohoku Univ., Sendai, Japan
Abstract :
3D integration is the most promising technology to enhance LSI performance beyond scaling theory. 3D LSIs have lots of advantages such as short wiring length, small chip size, and small pin capacitances, which leads to low power dissipation and high processing speed. However, there are still reliability problems to be solved. This paper describes mechanical stresses caused by Cu TSVs and CuSn microbumps and design guideline to minimize stress effects on 3D LSIs.
Keywords :
copper; copper alloys; integrated circuit design; integrated circuit reliability; large scale integration; three-dimensional integrated circuits; tin alloys; 3D LSI technology; 3D integration; CuSn; copper tin microbumps; design guideline; high-processing speed; low-power dissipation; mechanical stresses; pin capacitances; reliability issues; stress effect minimization; wiring length; Annealing; Compressive stress; Copper; Silicon; Three dimensional displays; 3D-LSI; Micro-Raman spectroscopy; Stress and Strain; Through-Si via (TSV);
Conference_Titel :
VLSI Technology (VLSIT), 2011 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-9949-6
