DocumentCode
554064
Title
A Hamming neural network integrated circuit using neuron-MOS transistor
Author
Guoqiang Hang ; Guofei Wang ; Yinan Mo ; Xiaohui Hu
Author_Institution
Sch. of Inf. & Electr. Eng., Zhejiang Univ. City Coll., Hangzhou, China
Volume
2
fYear
2011
fDate
26-28 July 2011
Firstpage
720
Lastpage
723
Abstract
In this paper, a new Hamming neural network integrated circuit using neuron-MOS transistor is presented. A matching calculation circuit and a winner-take-all circuit have been designed using neuron-MOS transistor as a key circuit element. The structure of the proposed circuit has been simplified significantly. From the HSPICE simulation results using TSMC 0.35μm double-polysilicon CMOS technology, the effectiveness of the proposed approach is validated.
Keywords
CMOS integrated circuits; MOSFET; SPICE; elemental semiconductors; neural nets; silicon; HSPICE simulation; Hamming neural network integrated circuit; calculation circuit; circuit element; double-polysilicon CMOS technology; neuron-MOS transistor; winner-take-all circuit; Biological neural networks; CMOS integrated circuits; Inverters; Logic gates; Neurons; Simulation; Transistors; Hamming neural network; Neuron MOS; matching calculation circuit; winner-take-all circuit;
fLanguage
English
Publisher
ieee
Conference_Titel
Natural Computation (ICNC), 2011 Seventh International Conference on
Conference_Location
Shanghai
ISSN
2157-9555
Print_ISBN
978-1-4244-9950-2
Type
conf
DOI
10.1109/ICNC.2011.6022217
Filename
6022217
Link To Document