• DocumentCode
    55814
  • Title

    Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint

  • Author

    Jinho Lee ; Moo-Kyoung Chung ; Yeon-Gon Cho ; Soojung Ryu ; Jung Ho Ahn ; Kiyoung Choi

  • Author_Institution
    Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea
  • Volume
    32
  • Issue
    11
  • fYear
    2013
  • fDate
    Nov. 2013
  • Firstpage
    1748
  • Lastpage
    1761
  • Abstract
    There has been extensive research on mapping and scheduling tasks on a many-core SoC. However, none considers the optimization of communication types, which can significantly affect performance, energy consumption, and local memory usage of the SoC. This paper presents an approach to automatic mapping and scheduling of tasks and communications on a many-core SoC. The key idea is to decide the type of each communication between message passing and shared memory when we do the mapping and scheduling. By assigning a proper type to each communication, we can optimize the energy consumption, performance, or energy-delay product. To solve the optimization problem, the approach adopts a probabilistic algorithm coupled with some heuristics. To enhance throughput of the system, it performs software pipelined scheduling of the tasks using a modified iterative modulo scheduling technique. Experiments show that our algorithm achieves on average 50.1% lower energy consumption, 21.0% higher throughput, and 64.9% lower energy- delay product, compared to shared memory only communication.
  • Keywords
    iterative methods; message passing; optimisation; probability; system-on-chip; automatic task mapping; automatic task scheduling; energy consumption; energy delay product; local memory constraint; many core SoC; message passing; modified iterative modulo scheduling technique; optimization problem; probabilistic algorithm; shared memory; software pipelined scheduling; Energy consumption; Memory management; Message passing; Processor scheduling; Scheduling; System-on-chip; Many-core; mapping; memory constraint; network-on-chip; scheduling;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2013.2266405
  • Filename
    6634549