• DocumentCode
    56217
  • Title

    POWER-TRUCTOR: An Integrated Tool Flow for Formal Verification and Coverage of Architectural Power Intent

  • Author

    Hazra, A. ; Mukherjee, Rohan ; Dasgupta, Parthasarathi ; Pal, Arnab ; Harer, Kevin M. ; Banerjee, Adrish ; Mukherjee, Sayan

  • Author_Institution
    Dept. of Comput. Sci. & Eng., IIT Kharagpur, Kharagpur, India
  • Volume
    32
  • Issue
    11
  • fYear
    2013
  • fDate
    Nov. 2013
  • Firstpage
    1801
  • Lastpage
    1813
  • Abstract
    With the growing complexity and gradually shrinking power requirements in the system-on-chip designs, sophisticated global power management policies (which orchestrate the switching between power states of multiple power domains) are commonplace. Recent research has paved some novel ways to verify the sophisticated on-chip architectural power management decisions and analyze the verification coverage. However, one of the primary challenges in verifying such power management architectures stems from the mixed implementation of such strategies, where the local power controllers are in hardware and the global power management is implemented in software/firmware. There has been lack of effort to build a unified and automated framework for power intent verification and coverage analysis for generic power management logics. This paper tries to develop an end-to-end automated framework enabled by a tool named POWER-TRUCTOR for power intent validation.
  • Keywords
    formal verification; hardware-software codesign; power system management; system-on-chip; POWER-TRUCTOR; coverage analysis; end-to-end automated framework; generic power management logics; global power management policies; local power controllers; on-chip architectural power management decisions; power intent verification; power requirements; system-on-chip designs; verification coverage; Computational modeling; Hardware; Hardware design languages; Integrated circuit modeling; Power control; Software; Timing; Assertion; coverage; formal verification; hardware/software co-verification; power intent verification;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2013.2267454
  • Filename
    6634589