DocumentCode
565184
Title
Statistical memristor modeling and case study in neuromorphic computing
Author
Pino, R.E. ; Hai Li ; Yiran Chen ; Miao Hu ; Beiye Liu
Author_Institution
Air Force Res. Lab., Rome, NY, USA
fYear
2012
fDate
3-7 June 2012
Firstpage
585
Lastpage
590
Abstract
Memristor, the fourth passive circuit element, has attracted increased attention since it was rediscovered by HP Lab in 2008. Its distinctive characteristic to record the historic profile of the voltage/current creates a great potential for future neuromorphic computing system design. However, at the nano-scale, process variation control in the manufacturing of memristor devices is very difficult. The impact of process variations on a memristive system that relies on the continuous (analog) states of the memristors could be significant. We use TiO2-based memristor as an example to analyze the impact of geometry variations on the electrical properties. A simple algorithm was proposed to generate a large volume of geometry variation-aware three-dimensional device structures for Monte-Carlo simulations. A neuromorphic computing system based on memristor-based bidirectional synapse design is proposed as case study. We analyze and evaluate the robustness of the proposed system in pattern recognition based on massive Monte-Carlo simulations, after considering input defects and process variations.
Keywords
Monte Carlo methods; electronic engineering computing; memristors; nanoelectronics; passive networks; semiconductor device manufacture; titanium compounds; HP Lab; Monte Carlo simulations; TiO2; TiO2-based memristor; continuous states; electrical properties; fourth passive circuit element; geometry variations; input defects variations; memristor devices manufacturing; memristor-based bidirectional synapse design; neuromorphic computing system; process variation control; statistical memristor modeling; three-dimensional device structures; voltage-current historic profile; Doping; Electrodes; Geometry; Memristors; Monte Carlo methods; Neurons; Semiconductor process modeling; Memristor; neural network; pattern recognition; process variation;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE
Conference_Location
San Francisco, CA
ISSN
0738-100X
Print_ISBN
978-1-4503-1199-1
Type
conf
Filename
6241566
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