• DocumentCode
    565212
  • Title

    Removing overhead from high-level interfaces

  • Author

    Kelley, Kyle ; Wachs, Megan ; Stevenson, John ; Richardson, Stephen ; Horowitz, Mark

  • fYear
    2012
  • fDate
    3-7 June 2012
  • Firstpage
    783
  • Lastpage
    789
  • Abstract
    Hardware modules would be much easier to reuse if they supported generic flexible high-level interfaces. However, these interfaces are rarely used since they lead to timing and area overheads compared to a customized design. This paper describes a reachability analysis framework that identifies over-provisioning in instances of flexible design, and offers a technique for annotating this information so that modern synthesis tools can remove most of the overhead. Results are demonstrated on a variety of flexible structures, including functional blocks, programmable state machines, and latency-insensitive interfaces.
  • Keywords
    high level synthesis; logic design; reachability analysis; area overhead; customized design; flexible design; flexible structures; functional blocks; generic flexible high-level interfaces; hardware modules; latency-insensitive interfaces; over-provisioning; programmable state machines; reachability analysis framework; synthesis tools; timing overhead; Algorithm design and analysis; Decoding; Logic gates; Optimization; Reachability analysis; Standards; Timing; Flexibility; HDL; Reachability; Synthesis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE
  • Conference_Location
    San Francisco, CA
  • ISSN
    0738-100X
  • Print_ISBN
    978-1-4503-1199-1
  • Type

    conf

  • Filename
    6241594